Opensource VLSI

Check the opensource ASIC resources collected by Matt Venn – click here

Check the opensource hardware tools list collected by Andreas Olofsson – click here

Open Circuit design

Open Circuit Design is committed to keeping open-source EDA tools useful and competitive with commercial tools. ” – official website

Tools included are – Open_PDKs, Magic, XCircuit, IRSIM, Netgen, Qrouter, Qflow, PCB hosts this software and getting an account is free which allows to start working on the tool.


Qflow is a complete tool chain for synthesizing digital circuits starting from verilog source and ending in physical layout for a specific target fabrication process.  ” – official website

Tools included are – iVerilog, Yosys, graywolf, qrouter, vesta


“Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a compiler, compiling source code written in Verilog (IEEE-1364) into some target format.” – official website

Yosys Open Synthesis Tool

“Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains.” – official website


“OpenTimer is a new static timing analysis (STA) tool to help IC designers quickly verify the circuit timing. It is developed completely from the ground up using C++17 to efficiently support parallel and incremental timing. ” – official website

VLSI System Design (VSD)

VLSI System Design is established by Kunal Ghosh. He lectures on OpenSource tools like iVerilog, Magic, Yosys, Opentimer etc. He is also an active member in RISC-V International community. Under VSD, he developed many udemy courses to teach various VLSI concepts using opensource tools. VSD also conducts many workshops which trains and encourage passionate people to build their own chip.

EDA playground

EDA playground is an online verilog / vhdl / c++ / python / systemverilog / systemc / perl complier. It also has EPWave which is the first web-browser based wave viewer. One can use free compilers present here and also Synopsys VCS or Cadence Incisive. But this required some validation. Check out their FAQ page for more details.


“You can code, compile, simulate, and debug Verilog designs, all from your browser. Your code, block diagrams, waveforms, and novel visualization capabilities are tightly integrated for a seamless design experience. While Makerchip introduces ground-breaking capabilities for advanced Verilog design, it also makes circuit design easy and fun! Tutorials will get you going.” – official website

It supports TL-Verilog standard which is makes easy to code circuits. Check more about this here for better and clear understanding.

ModelSim Student Edition

ModelSim student edition is a free software edition provided by Seimens (former Mentor Graphics company). Currently the current version software is delayed due to some changes in US federal regulations. But you can find the other versions online.

No longer provided


“FOSSEE (Free/Libre and Open Source Software for Education) project promotes the use of FLOSS tools in academia and research. The FOSSEE project is part of the National Mission on Education through Information and Communication Technology (ICT), Ministry of Education (MoE), Government of India.” – official website

There are many tools like eSim, openPLC, Scilab etc under FOSSEE. Do check them if you are interested in analog circuits development and simulation.


“RISC-V is a free and open ISA enabling a new era of processor innovation through open standard collaboration.” – official website

Joining the community as a member(which is free) is a great way to make your hands dirty with the knowledge on RISC -V ISA. There are many training courses, workshops which can help you to build a strong foundation on ISA.


“OpenCores is the most prominent online community for the development of gateware IP (Intellectual Properties) Cores. It is the place where such cores are shared and promoted in the spirit of Free and Open Source collaboration..” – official website

Joining the community as a member(which is free) will give you access to many opencores designed in multiple domains. You just need to download them and use them in your project. People who are looking for sample designs or for ready-to-use netlists can find them here for free.

Open Source FPGA Foundation

“The Open-Source FPGA Foundation will bring together companies, universities and individuals working on or interested in advancing open-source FPGA capabilities, establish the necessary cooperation channels, promote outreach and education, and coordinate joint efforts to enable easier collaboration around an open source FPGA ecosystem.” – official website

Check out their GitHub repository (click here) for projects related to FPGA
Merged with CHIPS Alliance – announcement link

Zero to ASIC course

Matt Venn follows the opensource chip designing community. He interviewed people on his YouTube channel, on his podcast and collected resources related to open source chip design. Click here to access the resources page.

CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high quality, open source hardware code (IP cores), interconnect IP (phy and logical protocols), and open source software development tools for design, verification, and more – according to their official website